this post was submitted on 02 Sep 2024
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Programmer Humor

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[–] Treczoks@lemmy.world 7 points 2 months ago (2 children)

I've seen way worse. Imagine a project that uses C preprocessor structures to make a C-compiler provide a kind-of C++. Macros that are pages long, and if you forget a single bracket anywhere, your ten pages look like a romance novel.

Or VHDL synthesis messages. You've got no real control over them, 99.9% of the warnings are completely irrelevant, but one line in a 50k lines output could hint at a problem - if you only found it.

So far, the output of C or C++ compilers (except for the above-mentioned project) has not been a problem or me, but I'm doing this for about 40 years now, so I've got a bit of experience.

[–] xthexder@l.sw0.com 7 points 2 months ago (2 children)

Yep, sadly I've been exposed to a few such codebases before. I certainly learned a lot about how NOT to design a project.

You've been at it longer than I have, but I've already had coworkers look at me like I'm a wizard for decoding their error message. You do get a feel for where the important parts of the error actually are over time. So much scrolling though...

[–] locuester@lemmy.zip 3 points 2 months ago (1 children)

You do get a feel for where the important parts of the error actually are

Yes, after decades of scanning large pages of text - code, errors, logs, search results, etc - a programmers ability to apply pattern recognition to screens of letters can be truly remarkable.

[–] xthexder@l.sw0.com 3 points 2 months ago

All I see now is blonde, brunette, redhead.

  • Cypher, The Matrix
[–] Treczoks@lemmy.world 2 points 2 months ago

Yes, I have my share of coworkers asking me when they run into problems, too. They even ask me when they have Windows problems. And I don't do Windows - I do Linux and embedded systems.

[–] dizzy@lemmy.ml 1 points 2 months ago (1 children)

I had to do a module programming in VHDL for my EE degree.

Every time I see it mentioned anywhere I have a compulsion to scream: FUCK VHDL AND ITS FUCKING ERRORS! NO YOUR ANALYSIS & SYNTHESIS IS UNSUCCESSFUL!

I did not pursue a career in electronics…

[–] Treczoks@lemmy.world 1 points 2 months ago

One of the key problems of learning VHDL at universities is that most teachers there are amazingly clueless about the language. Not only do you need a bit of a different mindset (you do not program, you define), but their knowledge of language and systems is stuck in the last century.

When I was a regular in a VHDL group on the site we don't mention here, we regularly had students who got taught techniques that are obsolete or at least deprecated since 1989.