this post was submitted on 22 Oct 2023
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One recent example is a makefile (in a subproject), w/ a dozen of targets to provision machines and run Ansible playbooks. Almost all the targets need at least a few variables to be set. Additionally, I needed any fresh invocation to clean the "build" directory before starting the work.
At first, I tried capturing those variables w/ a bunch of
ifeq
s,shell
s anddefine
s. However, I wasn't satisfied w/ the results for a couple of reasons:clean
target as a shell command at the top of the file.Then I tried capturing that in a target using
bmakelib.error-if-blank
andbmakelib.default-if-blank
as below.But this was not DRY as I had to repeat myself.
That's why I thought there may be a better way of doing this which led me to the manual and then the method I describe in the post.
That is true! My concern is that when the number of targets which don't need that initialisation grows I may have to rethink my approach.
I'll keep this thread posted of how this pans out as the makefile scales.
Love the attitude! I'm on the same boat. I could have just kept doing what I already knew but I thought a bit of manual reading is going to be well worth it.
You may like an approach I came up with some time ago.
In my
include
d file that's common among myMakefile
s:At the top of a
Makefile
that I want to ensure certain variables are set before it runs:I usually do these checks in sub-Makefiles to ensure someone didn't break the top level Makefile by not passing down a required macro.
To solve your DRY problem, you may not realize that you can generate target rules from built-in functions
eval
andforeach
and a user-defined new-line macro. Think of it like a preprocessor step.For example:
I winged it a bit for you, but hopefully I got it right, or at least right enough you get what I'm doing with this technique.