this post was submitted on 27 Oct 2024
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Intel hit critical mass enshitification. Their 13th and 14th gen chips have a near 100% failure rate. Thankfully China is already investing in RISC-V
Also worth noting that CISC is basically legacy tech at this point. Apple showed with M series chips that you can parallelize RISC a lot more efficiently. Since all the instructions are the same length, you can just load up batches of instructions and then evaluate any independent instructions in parallel. Macs now blow x86 based architecture out of the water both in performance and battery life. And exactly same thing can be done with RISC-V based chips as well, so Chinese companies can start out with a much better architecture out of the gate.